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United States Utility Patents
5,355,010 - 5,355,019
Previous 10 Next 10
| Number | | Title |
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5,355,010 |
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Semiconductor device with a dual type polycide layer comprising a uniformly p-type doped silicide |
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5,355,011 |
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Insulated gate field effect transistor having LDD structure and method of making the same including a channel stop having a peak impurity concentration, the channel stop provided below a channel region |
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5,355,012 |
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Semiconductor device |
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5,355,013 |
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Integrated radiation pixel detector with PIN diode array |
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5,355,014 |
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Semiconductor device with integrated RC network and Schottky diode |
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5,355,015 |
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High breakdown lateral PNP transistor |
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5,355,016 |
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Shielded EPROM package |
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5,355,017 |
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Lead frame having a die pad with metal foil layers attached to the surfaces |
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5,355,018 |
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Stress-free semiconductor leadframe |
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5,355,019 |
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Devices with tape automated bonding |
For U.S. patent law, rules, and procedures see MPEP.
Disclaimer. Information presented on this page while believed to be reliable, is provided "as is" with no warranties of its accuracy or timeliness. For legal advice seek help of a licensed professional.
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