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United States Utility Patents
5,280,440 - 5,280,449
Previous 10 Next 10
| Number | | Title |
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5,280,440 |
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Parallel adding circuit using 3.times.3 matrix of .+-. quinary number representation |
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5,280,441 |
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Semiconductor memory device |
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5,280,442 |
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Read-only memory |
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5,280,443 |
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Bit line structure for semiconductor memory device |
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5,280,444 |
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Dram comprising stacked-type capacitor having vertically protruding part and method of manufacturing the same |
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5,280,445 |
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Multi-dimensional memory cell using resonant tunneling diodes |
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5,280,446 |
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Flash eprom memory circuit having source side programming |
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5,280,447 |
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Floating gate nonvolatile memory with configurable erasure blocks |
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5,280,448 |
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Dynamic memory with group bit lines and associated bit line group selector |
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5,280,449 |
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Data memory and method of reading a data memory |
For U.S. patent law, rules, and procedures see MPEP.
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